Development platforms, ASIC & FPGA

SO-DIMM DDR5 Tester

This project contains open hardware KiCad design files for an experimental platform built around the Xilinx Kintex-7 FPGA, which can be used to interface with SO-DIMM DDR5 RAM modules. It is also possible to use the platform with single LPDDR5 memories by using custom adapters named LPDDR5 testbeds.


Contributors
10

Created
1 year ago

License
Apache-2.0

Languages

KiCad PCB(76.57%)
csv(14.00%)
KiCad schematic(9.11%)
Others(0.32%)

SO-DIMM DDR5 Tester

Copyright (c) 2023-2024 Antmicro

image image so dimm ddr5 tester rev 1 1 0 photo

Overview

This project contains open hardware KiCad design files for an experimental platform built around the Xilinx Kintex-7 FPGA, which can be used to interface with SO-DIMM DDR5 RAM modules. It is also possible to use the platform with single LPDDR5 memories by using custom adapters named LPDDR5 testbeds.

The SO-DIMM DDR5 Tester can be used with the open source Rowhammer Tester suite.

Project structure

The main repository directory contains KiCad PCB project files, a LICENSE and README. The remaining files are stored in the following directories:

  • img - contains graphics for this README
  • doc - contains PDF schematics
  • assets - contains visual assets for showcasing this design on the Open Hardware Portal

Key features

  • Kintex-7 FPGA (XC7K160T-FFG676)
  • SO-DIMM DDR5 memory slot
  • HDMI output connector
  • Ethernet RJ45 connector with 1GbE transceiver
  • USB-C debug connector with FT4232HQ FTDI USB controller
  • JTAG connector
  • PCIe 4x Edge connector
  • microSD card slot
  • 16 MBytes S25FL128S QSPI FLASH memory
  • IS66WVH16M8DBLL HyperRAM
  • External 7-15V DC power input

License

This project is published under the Apache-2.0 license.

Relevant projects

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